Class 11 | Processor | COA Notes

Class 11 | Processor | COA Notes
UNIT 5
Class 11 COA Processor

Processor

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01

Hardwired Versus Microprogrammed Control Unit

S.N. Hardwired Microprogrammed
1. Hardwired control unit is sequential circuit that generates control signals. Microprogrammed control unit is a unit with micro instructions that generate control signals.
2. Difficult to modify, decode and implement. Easy to modify, decode and implement.
3. Executes operations much faster. Executes operations slower.
4. Costly. Less costly.
5. No control memory use. Uses control memory.
6. Used in RISC (Reduced instruction set computer). Used in CISC (Complex instruction set computer).
02

Explain Arithmetic Logic Unit

ALU inside computer system showing input, CPU with control unit and ALU, output and main memory CPU Control Unit ALU Main Memory Input Output
Fig: ALU inside Computer System
  • It is part of CPU processor.
  • Perform the calculation like arithmetic and logical operations.
  • Resides inside the processor.
  • ALU is a digital circuit which executes instructions.
  • It takes instruction from register or main memory.
  • Perform arithmetic operation like addition, subtraction, multiplication, division and module and logical operation like AND, OR, NOT etc.
03

Explain Different Types of Register

Different types of processor registers including GPRs, FPRs, Program Counter, Stack Pointer, Status Register and Control Register GPRs R₀ R₁ R₂ Rₙ₋₁ FPRs Program Counter Stack Pointer Status Register Control Register
Fig: Different types of register
  • Registers are used to store data, instruction and provide control to CPU.
  • Register stores information during the time of execution.

1. General Purpose Register (GPRs)

These register store 8 bit data, we can also pair these register to store 16 bit data.

2. FPRs (Floating Point Register)

These register store floating point data for mathematical calculations.

3. Program Counter (PC)

It stores location of next instruction to be executed.

4. Stack Point Register

It stores location of first data in stack.

5. Status Register

It indicates status of ALU like overflow carry etc.

6. Control Register

It store control signals for CPU.

04

Explain Bus Architecture

Bus architecture of computer system showing microprocessor, memory, I/O device, external storage device, data bus, address bus and control bus Microprocessor (MPs) Memory I/O device External storage device Data Bus Address Bus Control Bus
Fig: Bus Architecture of Computer System
  • Bus is a shared transmission medium.
  • Group of conducting wires that carries data, address and control the whole system.
  • Made up of 3 wires.

1. Data Bus

  • Bidirectional.
  • May be 32 bit line or 64 bit lines.
  • Carries data from MPs to memory or I/O devices as well as vice versa.

2. Address Bus

  • Unidirectional.
  • Available in 16 bit lines.
  • Locates address of data.
  • Carries address from MPU to memory or I/O devices.

3. Control Bus

  • Transmits control and timing signals.
  • Example: clock, interrupt, reset, boot, enable, disable, acknowledge.
05

Instruction Execution

  • It is a machine language instruction.
  • It runs data as a machine instruction.
  • Program to be run consists of instruction stored in memory.
  • CPU executes the program instructions to finish the task.
  • CPU is primarily responsible for the execution of instruction like: fetch decode, execute memory access and write back.
Instruction execution flow showing start, fetch next instruction, execute instruction and halt Start Fetch Next Instruction Execute Instruction HALT Fetch cycle Execute cycle
Fig: Instruction Execution
06

The Following Six Steps Used to Execute a Single Instruction

  1. Fetch instruction.
  2. Decode instruction and fetch operands.
  3. Perform ALU operation.
  4. Access memory.
  5. Write back result to register file.
  6. Update the PC.
07

RISC Vs CISC

S.N.RISCCISC
1.RISC stands for Reduced Instruction set Computer.CISC stand for Complex Instruction set Computer.
2.Executes instructions per clock cycle.Can take more than one cycle to execute.
3.Need more memory to hold values.Need less memory to hold values.
4.Emphasize on software than hardware. For example one have to write efficient compiler with fewer instruction.Emphasizes on hardware. For example, it uses more transistor to implement more instruction.
5.Small number of instruction.Large number of instruction.
08

Addressing Modes

Different methods/modes for specifying the operand address in the instruction are known as addressing modes.

Various types of addressing modes are as follow:

1. Implicit Mode

  • Operands are specified implicitly.
  • Example: CMA which means complement accumulator.

2. Immediate Addressing Mode

  • Actual data is used in operands.
  • Example: Add 10, which means it will increment the value stored in accumulator by 10.
Immediate addressing mode showing opcode Add and operand 10 opcode operand Add 10
Fig: Immediate Addressing Mode

3. Direct Addressing Mode

  • The address field contain effective address of the operand.
  • Example: ADD X, which means it will increment the value stored in the accumulator by the value at memory location ‘X’.
Direct addressing mode showing instruction containing X directly referencing memory location X containing operand Instruction X X opcode
Fig: Direct Addressing Mode

4. Indirect Addressing Mode

Address field of the instruction specifies the address of memory location that contain the effective address.

Indirect addressing mode showing instruction A, memory location A containing B, and memory location B containing operand Instruction A A B operand B Memory
Fig: Indirect Addressing Mode

5. Register Direct Addressing Mode

  • The address field contain effective address of the operand.
  • Example: ADD R, which mean it will increment the value stored in the accumulator by the value stored at register location R.
Register direct addressing mode showing ADD R instruction directly referencing register R ADD R R Register
Fig: Register Direct Addressing Mode

6. Register Indirect Addressing Mode

Address field of the instruction specifies the address of register location that contain the effective address.

Register indirect addressing mode showing Load A instruction, register A containing B, and memory B containing operand Instruction Load A Register B A B operand Memory
Fig: Register Indirect Addressing Mode
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