Class 11 | Instruction Format | COA Notes

UNIT 3
Class 11 COA Instruction Format

Instruction Format

Original Scanned PDF – View Notes

01

Instruction Format Introduction

  • Instruction format is defined as standard machine instruction format that can be directly decoded and executed by CPU.
  • Group of instruction is called instructions set.
02

The Most Common Field in Instruction Are

1. Operation Field

Specifies the operation to be performed like addition etc.

2. Address Field

Contains the location of the operand i.e register or memory location.

3. Mode

Specifies how operand is to be found.

03

Example: Instruction Register – 16 Bit Format

15141312 111098 7654 3210
Addressing
mode
Opcode
(12–14 bit)
Address
(0 to 11 bits)
Addressing mode direct mode – 0 indirect mode – 1
Opcode decode instruction as per the opcode
Address Fetch from address at the operands
16-bit instruction register format recreated from the scanned note
04

Types of Instruction in Computer Architecture

Arrangement of a computer’s registers the different address field in the instruction format.

Instructions are classified into:

  1. Three Address Instruction
  2. Two Address Instruction
  3. One Address Instruction
  4. Zero Address Instruction

1. Three Address Instruction

General Format

operation source 1, source 2, Destination

Example

Add A, B, C

Where, A, B and C are three address field in memory. Add is the operation that is implemented on ‘A’ and ‘B’. A and B are source address and C is the destination address.

2. Two Address Instruction

General Format

operation source, Destination

Example

Add A, B

Where, A and B are two address field in memory. Add is the operation that is implemented on ‘A’ and ‘B’. This instruction adds the content of the A and B and saves result in ‘B’. A is source and B is destination.

3. One Address Instruction

General Format

operation sources

Example

ADD A, Accumulator

Where A is the Address field memory. ADD is the operation that is implemented on ‘A’ and Accumulator. This instruction adds the content of the A and Accumulator and saves result in Accumulator.

A is source and Accumulator is destination.

4. Zero Address Instruction

  • Address field are represented implicitly.
  • These instruction store address in a structure known as stack.

Example

TOP
05

Describe Instruction Cycle

Instruction are executed by the processor by going through a cycle for each Instruction.

Each instruction cycle consists of following phases:

  1. Fetch Instruction from memory.
  2. Decode the Instruction.
  3. Read effective address from memory.
  4. Execute the Instruction.
Instruction cycle showing fetch, decode, read address and execute phases Fetch Instruction Decode Instruction Read address from memory execute the Instruction
Fig: Instruction cycle
06

Instruction Cycle Phases

Fetch Cycle

Fetch instruction from memory.

Decode Cycle

Decode the instruction.

Read Cycle

Read effective address from memory.

Execute Cycle

Execute the instruction.

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